Examples of 'delay element' in a sentence
Meaning of "delay element"
A delay element is a component used in electronic circuits to introduce a time delay or to synchronize different parts of a system
How to use "delay element" in a sentence
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delay element
Other delay element structures may be envisaged.
An example of a differential delay element is a polyphase filter.
Each delay element include a latch.
Reflection before the delay element.
A fine delay element may include a resistance and a capacitance.
Reflection after the delay element.
The delay element is inverting.
A long transmission line can also provide a delay element.
A delay element may for example be formed of two inverters in series.
Thus the monostable can be used as a timer or delay element.
This delay element may be implemented in hardware with a delay line or circuit.
Such caps are characterized by a highly accurate electronic delay element.
The fine delay element may include a gate with at least two inputs.
The acceleration delay may be appropriately adjusted vía the delay element.
This is a slow process and so a delay element is provided in the video signal path.
See also
These detonators may be constructed to detonate instantaneously or may contain a delay element.
The second and third delay elements are similar to the first delay element.
In the actual implementation these may be combined into a single delay element.
Using a delay element excludes false actuations of the meter stipulated by electric and acoustic noises.
The semiconductor switches are connected to separate sides of said delay element and to ground.
BiCMOS differential delay element with constant pulse width.
This relatively broad range interferes with the accuracy of the delay element timing.
The first delay element receives an input signal Vin to be phase shifted.
Note it may be necessary to include a compensating delay element in the auxiliary signal path.
Inter alia, a line delay element should be used to retrieve the phase information.
You change how the Belleville spring hits the delay element.
Furthermore, the first delay element is programmable.
In one embodiment, each delay module is a programmable delay element.
In one embodiment, the fine delay element includes an inverter.
Moreover, a delay element may be interposed between each switch and the switching means.
However, it is obvious that this time delay element could be eliminated.
Triggering a delay element upon occurrence of a current exceeding a first predetermined threshold in the inductance ; and.
A reference numeral 1 denotes a delay element for delaying an inputted data.
The present invention includes the series connection of a scaling / combining element and a delay element.
Figure 4 shows the delay element applied to the invention.
In another embodiment, the second sorbent strip is provided with a delay element along its length.
In this embodiment, each delay element dj exhibits the same delay time d.
A switch 7 is interposed between synchronization input CKIN and the input of delay element 3.
Means for triggering a delay element when said first threshold is reached ; and.
As the Miller capacity of a NOR gate is low, a fine delay element is thus formed.
This delay element is for example the j-th element of a chain of K elements.
The apparatus of claim 5 wherein the delay element comprises at least one inverter.
How this delay element operates will now be described first with reference to FIG . 7.
A method according to claim 5 wherein said delay element comprises a series of digital gates.
Each overdrive pulse has a duration of M • Ts that is determined by the delay element.
The parameter includes a delay period for a delay element and / or a coefficient for a multiplier.
A delay element 3 is connected between a synchronization input CKIN and a synchronization output CKOUT.
The test circuit of claim 39 wherein the delay element comprises at least one inverter.
A time delay element 34 is wholly enclosed in the metallic sleeve and is capped by a cover 74.
Illustrates schematically a prior art delay element and corresponding pulse diagram ; Figure 2.
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