Examples of 'pipelined' in a sentence
Meaning of "pipelined"
Pipelined is a verb that describes the process of organizing tasks or operations in a sequential manner, often used in computing and project management
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- simple past tense and past participle of pipeline
How to use "pipelined" in a sentence
Basic
Advanced
pipelined
Then it is almost always pipelined to a processing plant.
All instructions are fully pipelined.
Whether a message is pipelined is an engineering tradeoff.
The second scenario assumes delays in delivery of pipelined schemes.
Making multiple pipelined requests on multiple connections can.
Messages may be partially pipelined if desired.
Pipelined queries concurrently.
Development of a portfolio of pipelined projects.
The divide unit is not pipelined and has significantly longer latencies.
Division is not pipelined.
The pipelined datapath is the most commonly used datapath design in microarchitecture today.
Hardware and software tasks are often pipelined in processor design.
Programs written for a pipelined processor deliberately avoid branching to minimize possible loss of speed.
They do not necessarily obtain high scores on modern pipelined computers.
Modern pipelined microprocessors use speculative execution to reduce the cost of conditional branch instructions.
See also
The various stages of the graph are implemented within a pipelined architecture.
Therefore the fully pipelined decoding allows significant throughput increase without extra hardware cost.
The arithmetic element is partitioned into two pipelined parallel processors.
The pipelined architecture was chosen to develop the ADC.
Various methods are used to reduce delays due to dependencies in pipelined implementations.
Intermediate data is pipelined across nodes in the MPP fashion.
The channel compensation unit and symbol combiner are operated in a pipelined manner.
Pipelined processors and superscalar processors are common examples found in most modern SISD computers.
It is deeply pipelined.
Pipelined in from Moscow station.
Hereby the option of using conditional jumps in during pipelined processing is achieved.
Pipelined table functions are used in the FROM clause of SELECT statements.
Other aspects relate to token triggered threading and pipelined instruction processing.
Pipelined converter comprises individual analog-to-digital conversion stages which are disposed in a pipeline.
The operations used in the primitive can also be pipelined rather effectively.
The pipelined architecture allows multiple instructions to overlap in execution, much like an assembly line.
Similarly the accumulation of all of the bits of a sample is performed in pipelined fashion.
These instructions are not pipelined and have multi-cycle latencies.
Elimination of the cost of a branch misprediction which can be high on deeply pipelined architectures.
Vector processing requires pipelined hardware, but not vice versa.
A computer in accordance with the present invention is both a parallel and a pipelined device.
In other words, a pipelined process outputs finished items at a rate determined by its slowest part.
This can be achieved in the example embodiment in a fully pipelined way with no feedbacks.
The signals can be pipelined through this portion of the apparatus to speed data read-in.
The preferred embodiment is a four stage branch instruction resolution system for a pipelined processor.
We first developed pipelined addition architectures exploiting the fast-carry lines present in modern FPGAs.
All of these operations proceed at video rates and can be pipelined for parallel operation.
The FMAC units are pipelined and have a three-cycle latency.
Also worth citing are the analog to digital converters that use switched capacitance pipelined architectures.
These include cache memory subsystems and pipelined operations, these latter requiring instruction prefetching.
The input and output data channels incorporate timing signals which control the pipelined processing.
Three DES-CBC implementations may be pipelined in series to provide parallel computation.
Sequences of GET and HEAD requests can always be pipelined.
FIGURE 2 is a block diagram of a pipelined compound accumulator embodying another aspect of the invention.
DDAs are well suited for hardware implementation and can be pipelined for maximized throughput.
